T. VASUDEVA REDDY; V. SRILATHA REDDY; PAPANI SRINIVAS; K. MADHAVA RAO; T. PREM CHANDER; M. S. S. BHARGAV. A Novel Diagonal Hamming technique for efficient Multi-Bit error correction in Memories. AIJR Abstracts, India, v. 8, n. 1, p. 78, 2026. Disponível em: https://abstracts.aijr.org/index.php/abs/article/view/216. Acesso em: 15 jun. 2026.