T. Vasudeva Reddy, V. Srilatha Reddy, Papani Srinivas, K. Madhava Rao, T. Prem chander, and M. S. S. Bhargav, “A Novel Diagonal Hamming technique for efficient Multi-Bit error correction in Memories”, AIJR Abs., vol. 8, no. 1, p. 78, Jan. 2026, Accessed: Jun. 15, 2026. [Online]. Available: https://abstracts.aijr.org/index.php/abs/article/view/216